1. Field of the Invention
The present invention relates to a digital communication field, and more particularly, to a digital phase locked loop (PLL) circuit having a short initial synchronizing time and a digital PLL method.
2. Description of the Related Art
To connect two different networks, one network must be synchronized with the other. For example, when two different channels, such as a basic channel generally used in a private switching system, and an integrated services digital network (ISDN) which is another network, are connected to each other, data is lost during communication since the channels are not synchronized with each other due to a difference between system clock signals used in each channel.